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path: root/advtrains_train_track/models/advtrains_dtrack_vst32.obj
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# Blender v2.78 (sub 0) OBJ File: 'rail_redo.blend'
# www.blender.org
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generated by cgit v1.2.3 (git 2.25.1) at 2024-06-30 09:19:47 +0000
com">It will be necessary to join and split trains using call-on routes. A call-on route may be set when: - there are no ROUTE reservations - there are TRAIN reservations only inside TCs that have "allow call-on" set == TC Properties == Note: Reversible property will not be implemented, assuming everything as non-rev. This is sufficient to cover all use cases, and is done this way in reality. REVERSIBLE - Whether trains are allowed to reverse while on track circuit This property is supposed to be set for station tracks, where there is a signal at each end, and for sidings. It should in no case be set for TCs covering turnouts, or for main running lines. When a TC is not set as reversible, the OWNED status is cleared from the TC right after the train left it, to allow other trains to pass it. If it is set reversible, interlocking will keep the OWNED state behind the train up to the next signal, clearing it as soon as the train passes another signal or enters a non-reversible section. CALL_ON_ALLOWED - Whether this TC being blocked (TRAIN or ROUTE) does not prevent shunt routes being set through this TC == More notes == - It may not be possible to switch turnouts when their TC has any state entry == Route releasing (TORR) == A train passing through a route happens as follows: Route set from entry to exit signal Train passes entry signal and enters first TC past the signal -> Route from signal cleared (TCs remain locked) -> ROUTE status of first TC past signal cleared Train continues along the route. Whenever train leaves a TC -> Clearing any routes set from this TC outward recursively - see "Reversing problem" Whenever train enters a TC -> Clear route status from the just entered TC Note that this prohibits by design that the train clears the route ahead of it. == Reversing Problem == Encountered at the Royston simulation in SimSig. It is solved there by imposing a time limit on the set route. Call-on routes can somehow be set anyway. Imagine this setup: (T=Train, R=Route, >=in_dir TCB) O-| Royston P2 |-O T->---|->RRR-|->RRR-|-- Train T enters from the left, the route is set to the right signal. But train is supposed to reverse here and stops this way: O-| Royston P2 |-O ------|-TTTT-|->RRR-|-- The "Route" on the right is still set. Imposing a timeout here is a thing only professional engineers can determine, not an algorithm. O-| Royston P2 |-O <-T---|------|->RRR-|-- The train has left again, while route on the right is still set. So, we have to clear the set route when the train has left the left TC. This does not conflict with call-on routes, because both station tracks are set as "allow call-on" Because none of the routes extends past any non-call-on sections, call-on route would be allowed here, even though the route is locked in opposite direction at the time of routesetting. Another case of this: --TTT/--|->RRR-- The / here is a non-interlocked turnout (to a non-frequently used siding). For some reason, there is no exit node there, so the route is set to the signal at the right end. The train is taking the exit to the siding and frees the TC, without ever having touched the right TC. ]]-- local TRAVERSER_LIMIT = 1000 local ildb = {} local track_circuit_breaks = {} local track_sections = {} -- Assignment of signals to TCBs local signal_assignments = {} -- track+direction -> signal position local influence_points = {} function ildb.load(data) if not data then return end if data.tcbs then track_circuit_breaks = data.tcbs end if data.ts then track_sections = data.ts end if data.signalass then signal_assignments = data.signalass end if data.rs_locks then advtrains.interlocking.route.rte_locks = data.rs_locks end if data.rs_callbacks then advtrains.interlocking.route.rte_callbacks = data.rs_callbacks end if data.influence_points then influence_points = data.influence_points end end function ildb.save() return { tcbs = track_circuit_breaks, ts=track_sections, signalass = signal_assignments, rs_locks = advtrains.interlocking.route.rte_locks, rs_callbacks = advtrains.interlocking.route.rte_callbacks, influence_points = influence_points, } end -- --[[ TCB data structure { [1] = { -- Variant: with adjacent TCs. ts_id = <id> -- ID of the assigned track section signal = <pos> -- optional: when set, routes can be set from this tcb/direction and signal -- aspect will be set accordingly. routeset = <index in routes> -- Route set from this signal. This is the entry that is cleared once -- train has passed the signal. (which will set the aspect to "danger" again) route_committed = <boolean> -- When setting/requesting a route, routetar will be set accordingly, -- while the signal still displays danger and nothing is written to the TCs -- As soon as the route can actually be set, all relevant TCs and turnouts are set and this field -- is set true, clearing the signal aspect = <asp> -- The aspect the signal should show. If this is nil, should show the most restrictive aspect (red) signal_name = <string> -- The human-readable name of the signal, only for documenting purposes routes = { <route definition> } -- a collection of routes from this signal route_auto = <boolean> -- When set, we will automatically re-set the route (designated by routeset) }, [2] = { -- Variant: end of track-circuited area (initial state of TC) ts_id = nil, -- this is the indication for end_of_interlocking section_free = <boolean>, --this can be set by an exit node via mesecons or atlatc, -- or from the tc formspec. } } Track section [id] = { name = "Some human-readable name" tc_breaks = { <signal specifier>,... } -- Bounding TC's (signal specifiers) -- Can be direct ends (auto-detected), conflicting routes or TCBs that are too far away from each other route = { origin = <signal>, -- route origin entry = <sigd>, -- supposed train entry point rsn = <string>, first = <bool> } route_post = { locks = {[n] = <pts>} next = <sigd> } -- Set whenever a route has been set through this TC. It saves the origin tcb id and side -- (=the origin signal). rsn is some description to be shown to the user -- first says whether to clear the routesetting status from the origin signal. -- locks contains the positions where locks are held by this ts. -- 'route' is cleared when train enters the section, while 'route_post' cleared when train leaves section. trains = {<id>, ...} -- Set whenever a train (or more) reside in this TC } Signal specifier (sigd) (a pair of TCB/Side): {p = <pos>, s = <1/2>} Signal Assignments: reverse lookup of signals assigned to TCBs signal_assignments = { [<signal pts>] = <sigd> } ]] -- function ildb.create_tcb(pos) local new_tcb = { [1] = {}, [2] = {}, } local pts = advtrains.roundfloorpts(pos) if not track_circuit_breaks[pts] then track_circuit_breaks[pts] = new_tcb return true else return false end end function ildb.get_tcb(pos) local pts = advtrains.roundfloorpts(pos) return track_circuit_breaks[pts] end function ildb.get_tcbs(sigd) local tcb = ildb.get_tcb(sigd.p) if not tcb then return nil end return tcb[sigd.s] end function ildb.create_ts(sigd) local tcbs = ildb.get_tcbs(sigd) local id = advtrains.random_id() while track_sections[id] do id = advtrains.random_id() end track_sections[id] = { name = "Section "..id, tc_breaks = { sigd } } tcbs.ts_id = id end function ildb.get_ts(id) return track_sections[id] end -- various helper functions handling sigd's local sigd_equal = advtrains.interlocking.sigd_equal local function insert_sigd_nodouble(list, sigd) for idx, cmp in pairs(list) do if sigd_equal(sigd, cmp) then return end end table.insert(list, sigd) end -- This function will actually handle the node that is in connid direction from the node at pos -- so, this needs the conns of the node at pos, since these are already calculated local function traverser(found_tcbs, pos, conns, connid, count, brk_when_found_n) local adj_pos, adj_connid, conn_idx, nextrail_y, next_conns = advtrains.get_adjacent_rail(pos, conns, connid, advtrains.all_tracktypes) if not adj_pos then --atdebug("Traverser found end-of-track at",pos, connid) return end